Tools produced by the group
We primarly produced three types of tools and additional resources: 1) libraries of evolved components and testbenches, 2) tools for evolution and 3) advanced seeds generating and evaluation. This list contains the highlighted tools, the rest of them can be found at the groups Github.Active tools and repositories
EvoApproxLib - library of approximate circuits
The EvoApproxLib is the latest version of our library of approximate circuits with formally guaranteed error parameters. Compared to EvoAppro8b, this library contains substantially more circuits with various bitwidths. Moreover, signed as well as unsigned implementations are considered.Hardware as well as software models are provided for each circuit.
Go to tool » ehw-fit/evoapproxlib PAPERAutoAx
An open problem is “how to effectively combine circuits from these libraries to construct complex approximate accelerators”. This work proposes a novel methodology for searching, selecting and combining the most suitable approximate circuits from a set of available libraries to generate an approximate accelerator for a given application. To enable fast design space generation and exploration, the methodology utilizes machine learning techniques to create computational models estimating the overall quality of processing and hardware cost without performing full synthesis at the accelerator level.
ehw-fit/autoax PAPERArithsGen
ArithsGen presents an open source tool that enables generation of various arithmetic circuits along with the possibility to export them to various formats which all serve their specific purpose. C language for easy simulation, Verilog for logic synthesis, BLIF for formal verification possibilities and CGP to enable further global optimization.
ehw-fit/ariths-gen PAPERTensorFlow Approximate Layers
This library extends TensorFlow library providing Approximate Convolutional (ApproxConv) layers, i.e. layers with reduced precision (typically 8 bits) implemented using approximate circuits (multipliers). The proposed layer enables to specify via parameter which approximate multiplier should be used (e.g. a multiplier from the EvoApproxLib). To maximize the throughput, the layer expects availability of a model of approximate multiplier in form of a Truth Table.
ehw-fit/tf-approximate PAPERArchived tools and repositories
EvoApprox8b - library of hundreds approximate 8b adders and multipliers
Approximate circuits and approximate circuit design methodologies attracted a significant attention of researchers as well as industry in recent years. In order to accelerate the approximate circuit and system design process and to support a fair benchmarking of circuit approximation methods, we propose a library of approximate adders and multipliers called EvoApprox8b. This library contains 473 Pareto optimal 8-bit approximate adders created from 13 conventional adders and 500 Pareto optimal 8-bit approximate multipliers created from 6 conventional multipliers. These implementations were evolved by a multi-objective Cartesian genetic programming. The EvoApprox8b library provides Verilog, Matlab and C models of all approximate circuits. In addition to standard circuit parameters, circuit error is given for seven different error metrics.
Go to tool » ehw-fit/evoapprox8b PAPERCGPAnalyzer
Cartesian genetic programming (CGP) is a branch of genetic programming in which candidate designs are represented using directed acyclic graphs. Evolutionary circuit design is the most typical application of CGP. This paper presents a new software tool <i>CGPAnalyzer</i> developed to analyse and visualise a genetic record (i.e. a log file) generated by CGP-based circuit design software. CGPAnalyzer automatically finds key genetic improvements in the genetic record and presents relevant phenotypes. The comparison module of CGPAnalyzer allows the user to select two phenotypes and compare their structure, history and functionality. It thus enables to reconstruct the process of discovering new circuit designs. This feature is demonstrated by means of the analysis of the genetic record from a 9-parity circuit evolution. The CGPAnalyzer tool is a desktop application with a graphical user interface created using Java v.8 and Swing library.
vkapusta/CGPAnalyser PAPERCartesian Genetic Programming Generator
In order to evaluate the fitness function the candidate solution has to be simulated. This step involves the interpretation of a CGP genotype for each vector. Since the fitness evaluation time dominates the time of whole evolutionary process in vast majority of problems and moreover a large number of evaluations is usually needed to achieve satisfactory result, it is important to simulate candidate solutions effectively. In order to maximize the overall performance, we have replaced the interpreter with corresponding optimized native machine code that directly calculates response for a single training vector.
Go to tool » PAPERZyEHW
ZyEHW is a joint hardware-software project for evolutionary design in the Xilinx Zynq-7000 field-programmable gate array. It contains (1) the hardware descriptions of the evolutionary design framework implemented in the programmable logic, (2) the software for both ARM processors of the Zynq platform and (3) the software required for generating the inputs and processing the outputs of the evolutionary design framework. The evolutionary design framework is based on our developed architecture where the candidate solutions can be established and mutated by fine-grained partial reconfiguration of look-up tables. Our advanced control unit and the reduced routing ensures that six candidate solutions can be evaluated in parallel (in a XC7Z020 device) and at a very high operational frequency (a larger device would allow to evaluate even more candidate solutions in parallel). The program code is deployed into one of the processors of Zynq-7000 and the evolutionary design framework into its programmable logic. Evolutionary on-line synthesis is performed by the other available processor. The functionality is transferred from software into hardware on-line, during runtime. This approach serves essentially the same purpose as high-level synthesis but the synthesis can be performed by a simple embedded computational platform and on-line. Version v1.0 of ZyEHW includes the complete implementation of the case study for image filter evolution (noise filtering and edge detection).
dobairoland/ZyEHW PAPER