The EvoApproxLibLITE is the lightweight version of our library of approximate circuits with formally guaranteed error parameters. Hardware as well as software models are provided for each circuit.

Circuit name MAE WCE MRE EP power area Download model
mul11u_001 [1] 0.00 % 0.00 % 0.00 % 0.00 % 0.930 1340.8 Verilog fileC fileMatlab MEXPython PYX
mul11u_07G [1] 0.019 % 0.098 % 0.80 % 99.71 % 0.707 1085.0 Verilog fileC fileMatlab MEXPython PYX
mul11u_0CV [1] 0.034 % 0.20 % 1.15 % 99.84 % 0.657 1066.7 Verilog fileC fileMatlab MEXPython PYX
mul11u_0CY [1] 0.09 % 0.47 % 3.00 % 99.87 % 0.517 845.7 Verilog fileC fileMatlab MEXPython PYX
mul11u_06R [1] 0.18 % 0.99 % 4.96 % 99.88 % 0.410 694.1 Verilog fileC fileMatlab MEXPython PYX
mul11u_0F3 [1] 0.38 % 1.99 % 9.18 % 99.89 % 0.311 561.8 Verilog fileC fileMatlab MEXPython PYX
mul11u_0DX [1] 1.18 % 6.03 % 19.95 % 99.90 % 0.236 524.2 Verilog fileC fileMatlab MEXPython PYX

Reported error parameters: MAE - Mean Absolute Error (Mean Error Magnitude), WCE - Worst-Case Absolute Error (Error Magnitude / Error Significance), MSE - Mean Squared Error, MRE - Mean Relative Error (Mean Relative Error Distance), WCRE - Worst-Case Relative Error, EP - Error Probability (Error Rate)  |  Reported design parameters: power - power consumption in mW, area - area on the chip in um2, dly - delay, all values obtained using Synopsys DC (45 nm PDK, 1 V, 25 ℃)  |  Error parameters marked by were verified using a formal technique analyzing all possible input combinations. There is a formal guarantee that the error is not worse than the shown value. The exact values are included at the beginning of each C file and Verilog file.

COMPARISON

Comparison with the complete EvoApproxLib dataset on various metrics. The first plot shows the performance wrt. the parameters used for pareto filtration. The black dots are the circuits included in this dataset. The blue dots are parameters of the circuits included in the full version of EvoApproxLib. Note that the parameters of the accurate implementation shown in the figure correspond with those exhibiting the lowest power consumption.

REFERENCES
  1. V. Mrazek, S. S. Sarwar, L. Sekanina, Z. Vasicek and K. Roy, Design of power-efficient approximate multipliers for approximate artificial neural networks, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, 2016, pp. 1-7.