The EvoApproxLibLITE is the lightweight version of our library of approximate circuits with formally guaranteed error parameters. Hardware as well as software models are provided for each circuit.

Circuit name MAE WCE MRE EP power area Download model
mul12u_332 [1] 0.00 % 0.00 % 0.00 % 0.00 % 1.157 1605.0 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_22U [2] 0.0000054 % 0.000006 % 0.00038 % 87.50 % 1.156 1598.9 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2BS [1] 0.000025 % 0.0001 % 0.0019 % 68.75 % 1.142 1556.7 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2BT [1] 0.000073 % 0.00029 % 0.005 % 81.25 % 1.120 1514.9 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2BV [1] 0.00048 % 0.0019 % 0.026 % 93.75 % 1.053 1405.1 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2CJ [1] 0.0071 % 0.028 % 0.16 % 96.86 % 0.925 1274.6 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2C1 [1] 0.031 % 0.12 % 0.87 % 99.68 % 0.670 993.5 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_2EF [1] 0.18 % 0.73 % 3.29 % 99.90 % 0.369 617.6 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_33H [1] 1.53 % 6.10 % 15.79 % 99.95 % 0.106 269.4 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul12u_34G [1] 18.74 % 74.95 % 87.98 % 99.95 % 0.0003 2.3 Verilog fileC fileMatlab MEXPython PYX

Reported error parameters: MAE - Mean Absolute Error (Mean Error Magnitude), WCE - Worst-Case Absolute Error (Error Magnitude / Error Significance), MSE - Mean Squared Error, MRE - Mean Relative Error (Mean Relative Error Distance), WCRE - Worst-Case Relative Error, EP - Error Probability (Error Rate)  |  Reported design parameters: power - power consumption in mW, area - area on the chip in um2, dly - delay, all values obtained using Synopsys DC (45 nm PDK, 1 V, 25 ℃)  |  Error parameters marked by were verified using a formal technique analyzing all possible input combinations. There is a formal guarantee that the error is not worse than the shown value. The exact values are included at the beginning of each C file and Verilog file.

COMPARISON

Comparison with the complete EvoApproxLib dataset on various metrics. The first plot shows the performance wrt. the parameters used for pareto filtration. The black dots are the circuits included in this dataset. The blue dots are parameters of the circuits included in the full version of EvoApproxLib. Note that the parameters of the accurate implementation shown in the figure correspond with those exhibiting the lowest power consumption.

REFERENCES
  1. V. Mrazek, Z. Vasicek, L. Sekanina, H. Jiang and J. Han, Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, pp. 2572-2576, Nov. 2018.
  2. V. Mrazek, Z. Vasicek and R. Hrbacek, Role of circuit representation in evolutionary design of energy-efficient approximate circuits in IET Computers & Digital Techniques, vol. 12, no. 4, pp. 139-149, 7 2018.