The EvoApproxLibLITE is the lightweight version of our library of approximate circuits with formally guaranteed error parameters. Hardware as well as software models are provided for each circuit.

Circuit name MAE WCE MRE EP power area Download model
mul8u_1JJQ [1] 0.00 % 0.00 % 0.00 % 0.00 % 0.391 709.6 Verilog PDK45Verilog fileC fileMatlab MEXPython PYX
mul8u_12YX [1] 0.00076 % 0.0092 % 0.019 % 14.06 % 0.386 680.5 Verilog fileC fileMatlab MEXPython PYX
mul8u_ZDF [1] 0.0067 % 0.052 % 0.13 % 40.43 % 0.365 651.9 Verilog fileC fileMatlab MEXPython PYX
mul8u_XFM [1] 0.067 % 0.40 % 0.82 % 72.03 % 0.287 558.5 Verilog fileC fileMatlab MEXPython PYX
mul8u_2NDH [2] 0.44 % 4.13 % 5.03 % 98.68 % 0.142 347.8 Verilog fileC fileMatlab MEXPython PYX
mul8u_R36 [1] 5.84 % 49.27 % 31.87 % 98.75 % 0.015 60.5 Verilog fileC fileMatlab MEXPython PYX
mul8u_TD3 [1] 24.81 % 99.22 % 100.00 % 99.22 % 0.000 0.0 Verilog fileC fileMatlab MEXPython PYX

Reported error parameters: MAE - Mean Absolute Error (Mean Error Magnitude), WCE - Worst-Case Absolute Error (Error Magnitude / Error Significance), MSE - Mean Squared Error, MRE - Mean Relative Error (Mean Relative Error Distance), WCRE - Worst-Case Relative Error, EP - Error Probability (Error Rate)  |  Reported design parameters: power - power consumption in mW, area - area on the chip in um2, dly - delay, all values obtained using Synopsys DC (45 nm PDK, 1 V, 25 ℃)  |  Error parameters marked by were verified using a formal technique analyzing all possible input combinations. There is a formal guarantee that the error is not worse than the shown value. The exact values are included at the beginning of each C file and Verilog file.

COMPARISON

Comparison with the complete EvoApproxLib dataset on various metrics. The first plot shows the performance wrt. the parameters used for pareto filtration. The black dots are the circuits included in this dataset. The blue dots are parameters of the circuits included in the full version of EvoApproxLib. Note that the parameters of the accurate implementation shown in the figure correspond with those exhibiting the lowest power consumption.

REFERENCES
  1. V. Mrazek, R. Hrbacek, Z. Vasicek and L. Sekanina, EvoApprox8b: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 258-261.
  2. M. Ceska, J. Matyas, V. Mrazek, and T. Vojnar, Designing Approximate Arithmetic Circuits with Combined Error Constraints. In: Proceeding of 25th Euromicro Conference on Digital System Design 2022 (DSD'22). Gran Canaria, 2022.